For this project we had to create a circuit that would display numbers counting from 00 to 80 as a button is pushed, like at the DMV. Our circuit was to follow certain specifications including using common cathode displays, using a multiplexed design, using an 74LS93 MSI counter IC for the ones-unit display, and using D Flip-Flops for the tens-unit display. The display was to also have a reset.
PLD mode allows any circuit designed to be transferred to a Cmod S6 chip and easily breadboarded. Design mode only allows a circuit to be designed, not transferred. On the Cmod S6 chip there are many different pins that are inserted into the breadboard. Each pin has a corresponding pin input output (PIO) label in PLD mode. Input connectors are used where inputs are designed to be, such as switches, buttons, or clocks. Output connects are used where outputs are, such as LEDs or seven segment displays. Wires are used to connect each pin assignment to its desired purpose on the breadboard. Uploading the PLD design onto the Cmod S6 chip is a fairly simple process that consists of plugging the chip into the computer and selecting the transfer button on the computer. PLD mode is very useful, but can also be confusing at some times.
Bill of Materials
This project required the use of two different types of circuits, SSI and MSI. SSI is a small scale integration circuit, which means that it consists of individual components, such as flip flops. MSI is a medium scale integration circuit, which means that it consists of one component that takes the place of several smaller components, such as flip flops. MSI circuits do have some limitations. They can only count up and must start at 0. Although SSI circuits do not experience these limitations they do have the Ripple Effect. Multiple flip flops in a row cause a delay of the signal that results in flickering of the seven segment display. For my DMV display the least significant display counted by means of a MSI circuit and the most significant display counted by means of a SSI circuit. My circuit runs as follows. A switch is toggled to act as a clock for the MSI circuit (LS74193)and it counts up starting at 0. When the MSI circuit loads a 10 the LSD is set to reset to 0. When the MSI loads a 10 there is another wire running from the load to the clock of the first flip flop of the SSI circuit. This means that after the display reaches 9 the LSD will reset to 0 and the MSD will count up 1. The flip flops are connected with opposite polarity so that it counts up. The presets are set to power so that it begins with 0. The MSD is connected to each flip flop's Q. Each flip flop's Q is also connected to a NAND gate, which is connected to an AND gate that is connected to the clears. The AND gate is also attached to another switch designed to clear both displays. This switch is connected to both circuits clear inputs. A different NAND gate makes the circuit stop counting as soon as the MSD reaches 8. The NAND gate registers an 8 and connects to an AND gate along with the original switch to control when the 193 chip can count. My circuit was very similar to most of the classes, but did have some differences in the organization. Overall, this project was fairly complex and required a deep knowledge of each chip. Even a simple mistake could throw off the whole circuit.