SIXTY SECOND TIMER
Project Overview
For this project we had to create a circuit to make a display count from 0 to 59 and automatically reset itself. The design was also supposed to have a reset switch to display a zero at any time. Our circuit was to follow certain specifications including using common cathode displays, using a multiplexed design, using an 74LS163 MSI counter IC for the ones-unit display, and using J/K Flip-Flops for the tens-unit display.
Multisim Circuit
PLD Circuit
This project is very similar to the DMV Display project, but has a few major differences. Both designs were counting from 00 to a certain number, but the DMV display was supposed to stop, while the 60 second counter was supposed to automatically reset itself and keep counting. Both designs also used one MSI circuit and one SSI circuit, but they used different ones. The DMV display used a 74LS93 chip and D Flip-Flops, while the 60 sec counter used a 74LS163 chip and J/K Flip-Flops. Although the designs were very similar the few differences result in a very different machine.
Conclusion
This project required the use of a synchronous counter. When using synchronous counters all flip-flops are simultaneously clocked by an external clock. Asynchronous counters do not require the use of an external clock. There are two types of MSI Gates that utilize synchronous counters, 74LS163 and 74LS193. There are a few major differences between the two chips. The '163 is a four bit synchronous up counter and has a synchronous load and clear, which means that what is loaded is actually displayed. The '193 is a four bit synchronous up/down counter with an asynchronous load and clear that requires a number to load one past what needs displayed. For this project we could use either chip, but the '163 was the smarter choice since we just needed an up counter. I feel like my design did differ from a lot of my classmates because I tend to overcomplicate things, but it still had the same result.
My circuit runs as follows.
Clock voltage powers the 74LS163 chip. The pre-loadable count is connected to digital low so it starts at zero. The chip's load is set to detect 9 since what is loaded will be displayed. 9 is attached to load so that every time it is detected the chip will begin counting from 0 again. This chip is connected to the least significant display (ones place). When a 9 is detected there is another wire connected to the clock of the flip-flops that triggers it to count. This means that after every 9 the most significant display will count up one. Four J/K Flip-Flops were used in my design, even though one was unnecessary. Each flip-flop was negatively triggered so they were attached to Q of the one before to count up. Opposite polarities are attached to make it count up. The preset, J, and K on each flip-flop is attached to digital high so that the MSD begins its count at 0. The Q on each flip-flop was also attached to the MSD to count. The clear on each flip-flop is attached to an AND gate set to register when either a 6 is detected or a reset switch is flipped. This means that the MSD will become a 0 after a 5 is displayed or when the whole circuit is set to reset. The reset switch is also attached to an AND gate with the gate that detects a 9 on the LSD. This AND gate is attached to the clear on the 74LS163 which results in the LSD becoming zero after a 9 is detected or when the reset switch is detected. This way the reset switch turns both displays to zero.
My circuit runs as follows.
Clock voltage powers the 74LS163 chip. The pre-loadable count is connected to digital low so it starts at zero. The chip's load is set to detect 9 since what is loaded will be displayed. 9 is attached to load so that every time it is detected the chip will begin counting from 0 again. This chip is connected to the least significant display (ones place). When a 9 is detected there is another wire connected to the clock of the flip-flops that triggers it to count. This means that after every 9 the most significant display will count up one. Four J/K Flip-Flops were used in my design, even though one was unnecessary. Each flip-flop was negatively triggered so they were attached to Q of the one before to count up. Opposite polarities are attached to make it count up. The preset, J, and K on each flip-flop is attached to digital high so that the MSD begins its count at 0. The Q on each flip-flop was also attached to the MSD to count. The clear on each flip-flop is attached to an AND gate set to register when either a 6 is detected or a reset switch is flipped. This means that the MSD will become a 0 after a 5 is displayed or when the whole circuit is set to reset. The reset switch is also attached to an AND gate with the gate that detects a 9 on the LSD. This AND gate is attached to the clear on the 74LS163 which results in the LSD becoming zero after a 9 is detected or when the reset switch is detected. This way the reset switch turns both displays to zero.